Abstract
Modern Computer systems increasingly use high-speed multi-gigabit/second (GB/s) serial printed circuit board (PCB) interconnects in order to transfer data between components, both on board, to daughter cards and across backplanes. As the transmission speeds increase it is becoming increasingly more difficult in terms of time and money, to measure the integrity of the received signals and engineers are reliant on simulation to ensure low bit error rate (BER) communication. Transmission line losses are one of major limiting factor in terms of distance capability and speed of operation for these modern high speed serial communication systems. Therefore the accurate modelling of losses in PCBs has recently become an area of intense investigation.
Dielectric models have been formulated, containing the physics of the dielectric loss mechanism that predict the experimentally observed behaviour of the woven glass and resin construction of the composite laminate. At the frequencies excited in high speed digital serial links, the current flows predominantly at the surface of the conductor due to the skin effect and is thus strongly affected by any atomic scale surface roughness. Several new models have been proposed that deal with the additional losses caused by surface roughness, as the frequencies of the serial interconnect increase.
Simulation work has been carried out for multi-GB/s interconnects with the new aforementioned conductor loss models demonstrating improvements in accuracy and better agreement with experimental data.